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authorRussell King <rmk+kernel@armlinux.org.uk>2016-11-01 20:27:13 +0000
committerRussell King <rmk+kernel@armlinux.org.uk>2017-01-16 16:45:02 +0000
commit0d7f4f0594fc38531e37b94a73ea3ebcc9d9bc11 (patch)
tree846cd5eeec69b60b87d50eefd7ba68d5d43c9cc3 /sound/isa/opti9xx
parented79c9d34f4f4c5842b66cab840315e7ac29f666 (diff)
MAINTAINERS: update rmk's entries
Update my entries in the MAINTAINERS file with the same email address for kernel work, and, now that the git tree is hosted on more suitable hardware, add git tree references where appropriate. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'sound/isa/opti9xx')
0 files changed, 0 insertions, 0 deletions
86/haswell/floating-point.json?id=c26665ab5c49ad3e142e0f054ca3204f259ba09c&id2=7a308bb3016f57e5be11a677d15b821536419d36'>diff)
x86/microcode/intel: Drop stashed AP patch pointer optimization
This was meant to save us the scanning of the microcode containter in the initrd since the first AP had already done that but it can also hurt us: Imagine a single hyperthreaded CPU (Intel(R) Atom(TM) CPU N270, for example) which updates the microcode on the BSP but since the microcode engine is shared between the two threads, the update on CPU1 doesn't happen because it has already happened on CPU0 and we don't find a newer microcode revision on CPU1. Which doesn't set the intel_ucode_patch pointer and at initrd jettisoning time we don't save the microcode patch for later application. Now, when we suspend to RAM, the loaded microcode gets cleared so we need to reload but there's no patch saved in the cache. Removing the optimization fixes this issue and all is fine and dandy. Fixes: 06b8534cb728 ("x86/microcode: Rework microcode loading") Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20170120202955.4091-2-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/haswell/floating-point.json')