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authorHans Verkuil <hansverk@cisco.com>2017-01-02 09:54:24 -0200
committerMauro Carvalho Chehab <mchehab@s-opensource.com>2017-01-30 11:41:51 -0200
commit8015d6b83cadc8f9f94c7bc8430255090ddf43d4 (patch)
tree41658a538b91781b400fafed633492cfde670bdf /sound/pci/emu10k1
parented72b81bb7a49e8bfaa8dd6ab0b0e103ff0771ae (diff)
[media] cec-intro.rst: mention the v4l-utils package and CEC utilities
Mention where to find the CEC utilities. Signed-off-by: Hans Verkuil <hansverk@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'sound/pci/emu10k1')
0 files changed, 0 insertions, 0 deletions
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-02-24 07:55:34 +0000
C table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'sound/usb/caiaq/midi.h')