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author | Ricardo Ribalda <ricardo.ribalda@gmail.com> | 2017-01-11 10:11:44 +0100 |
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committer | Wolfram Sang <wsa@the-dreams.de> | 2017-01-12 20:52:12 +0100 |
commit | 701dc207bf551d9fe6defa36e84a911e880398c3 (patch) | |
tree | 7ec8b3ac8cd6431cbf19bc88b1ec273ed87a10f2 /tools/testing/selftests | |
parent | 2659161dd40dbb599a19f320164373093df44a89 (diff) |
i2c: piix4: Avoid race conditions with IMC
On AMD's SB800 and upwards, the SMBus is shared with the Integrated
Micro Controller (IMC).
The platform provides a hardware semaphore to avoid race conditions
among them. (Check page 288 of the SB800-Series Southbridges Register
Reference Guide http://support.amd.com/TechDocs/45482.pdf)
Without this patch, many access to the SMBus end with an invalid
transaction or even with the bus stalled.
Reported-by: Alexandre Desnoyers <alex@qtec.com>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>:
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'tools/testing/selftests')
0 files changed, 0 insertions, 0 deletions