summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/display/renesas,du.txt
blob: 1a02f099a0ff0a3ac459c752ea8031ef8d88b9f0 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
* Renesas R-Car Display Unit (DU)

Required Properties:

  - compatible: must be one of the following.
    - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
    - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
    - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
    - "renesas,du-r8a7792" for R8A7792 (R-Car V2H) compatible DU
    - "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
    - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
    - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
    - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU

  - reg: A list of base address and length of each memory resource, one for
    each entry in the reg-names property.
  - reg-names: Name of the memory resources. The DU requires one memory
    resource for the DU core (named "du") and one memory resource for each
    LVDS encoder (named "lvds.x" with "x" being the LVDS controller numerical
    index).

  - interrupt-parent: phandle of the parent interrupt controller.
  - interrupts: Interrupt specifiers for the DU interrupts.

  - clocks: A list of phandles + clock-specifier pairs, one for each entry in
    the clock-names property.
  - clock-names: Name of the clocks. This property is model-dependent.
    - R8A7779 uses a single functional clock. The clock doesn't need to be
      named.
    - R8A779[0123456] use one functional clock per channel and one clock per
      LVDS encoder (if available). The functional clocks must be named "du.x"
      with "x" being the channel numerical index. The LVDS clocks must be
      named "lvds.x" with "x" being the LVDS encoder numerical index.
    - In addition to the functional and encoder clocks, all DU versions also
      support externally supplied pixel clocks. Those clocks are optional.
      When supplied they must be named "dclkin.x" with "x" being the input
      clock numerical index.

Required nodes:

The connections to the DU output video ports are modeled using the OF graph
bindings specified in Documentation/devicetree/bindings/graph.txt.

The following table lists for each supported model the port number
corresponding to each DU output.

		Port 0		Port1		Port2		Port3
-----------------------------------------------------------------------------
 R8A7779 (H1)	DPAD 0		DPAD 1		-		-
 R8A7790 (H2)	DPAD		LVDS 0		LVDS 1		-
 R8A7791 (M2-W)	DPAD		LVDS 0		-		-
 R8A7792 (V2H)	DPAD 0		DPAD 1		-		-
 R8A7793 (M2-N)	DPAD		LVDS 0		-		-
 R8A7794 (E2)	DPAD 0		DPAD 1		-		-
 R8A7795 (H3)	DPAD		HDMI 0		HDMI 1		LVDS
 R8A7796 (M3-W)	DPAD		HDMI		LVDS		-


Example: R8A7790 (R-Car H2) DU

	du: du@feb00000 {
		compatible = "renesas,du-r8a7790";
		reg = <0 0xfeb00000 0 0x70000>,
		      <0 0xfeb90000 0 0x1c>,
		      <0 0xfeb94000 0 0x1c>;
		reg-names = "du", "lvds.0", "lvds.1";
		interrupt-parent = <&gic>;
		interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
			     <0 268 IRQ_TYPE_LEVEL_HIGH>,
			     <0 269 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp7_clks R8A7790_CLK_DU0>,
		         <&mstp7_clks R8A7790_CLK_DU1>,
		         <&mstp7_clks R8A7790_CLK_DU2>,
		         <&mstp7_clks R8A7790_CLK_LVDS0>,
		         <&mstp7_clks R8A7790_CLK_LVDS1>;
		clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				du_out_rgb: endpoint {
				};
			};
			port@1 {
				reg = <1>;
				du_out_lvds0: endpoint {
				};
			};
			port@2 {
				reg = <2>;
				du_out_lvds1: endpoint {
				};
			};
		};
	};