blob: d58b3958f3eaf3c599b5a4bfc6753bfba8f5714a (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
|
* IBM/AMCC/APM GPIO Controller for PowerPC 4XX series and compatible SoCs
All GPIOs are pin-shared with other functions. DCRs control whether a
particular pin that has GPIO capabilities acts as a GPIO or is used for
another purpose. GPIO outputs are separately programmable to emulate
an open-drain driver.
Required properties:
- compatible: must be "ibm,ppc4xx-gpio"
- reg: address and length of the register set for the device
- #gpio-cells: must be set to 2. The first cell is the pin number
and the second cell is used to specify the gpio polarity:
0 = active high
1 = active low
- gpio-controller: marks the device node as a gpio controller.
Example:
GPIO0: gpio@ef600b00 {
compatible = "ibm,ppc4xx-gpio";
reg = <0xef600b00 0x00000048>;
#gpio-cells = <2>;
gpio-controller;
};
|
