ASoC: wm8974: configure pll and mclk divider automatically

This adds a set_sysclk() DAI op so the card driver can set the
input clock frequency.  If this is done, the pll and mclk divider
are configured to produce the required 256x fs clock when the
sample rate is set by hw_params().

These additions make the codec work with the simple-card driver.
Card drivers calling set_pll() and set_clkdiv() directly are
unaffected.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

path: root/socket.h

/*
 * Copyright (C) 2014-2015 Tobias Klauser <tklauser@distanz.ch>
 *
 * This file is part of llmnrd.
 *
 * llmnrd is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, version 2 of the License.
 *
 * llmnrd is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with llmnrd.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef SOCKET_H
#define SOCKET_H

#include <stdbool.h>
#include <stdint.h>

int socket_open_ipv4(uint16_t port);
int socket_open_ipv6(uint16_t port);
int socket_open_rtnl(void);

int socket_mcast_group_ipv4(int sock, unsigned int ifindex, bool join);
int socket_mcast_group_ipv6(int sock, unsigned int ifindex, bool join);

#endif /* SOCKET_H */