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generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-09-28 23:09:47 +0000
'commit-info'> authorAndre Przywara <andre.przywara@arm.com>2016-11-16 17:57:16 +0000 committerMarc Zyngier <marc.zyngier@arm.com>2016-12-09 15:46:59 +0000 commit266068eabb1077adf7d74a66de6610e7a6205d02 (patch) treed070029ff263a01a25fce431e08134e256c57f33 /Documentation parentfd5ebf99f814fadae0dd50893699ba17e1b4af42 (diff)
KVM: arm/arm64: vgic-v2: Limit ITARGETSR bits to number of VCPUs
The GICv2 spec says in section 4.3.12 that a "CPU targets field bit that corresponds to an unimplemented CPU interface is RAZ/WI." Currently we allow the guest to write any value in there and it can read that back. Mask the written value with the proper CPU mask to be spec compliant. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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