The SOR driver for Tegra requires the SOR power partition to be enabled.
Now that Tegra supports the generic PM domain framework we manage the
SOR power partition via this framework. However, the sequence for
gating/ungating the SOR power partition requires that the SOR reset is
asserted/de-asserted at the time the SOR power partition is
gated/ungated, respectively. Now that the reset control core assumes
that resets are exclusive, the Tegra generic PM domain code and the SOR
driver cannot request the same reset unless we mark the reset as shared.
Sharing resets will not work in this case because we cannot guarantee
that the reset will be asserted/de-asserted at the appropriate time.
Therefore, given that the Tegra generic PM domain code will handle the
resets, do not request the reset in the SOR driver if the SOR device has
a PM domain associated.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

path: root/colors.h

#ifndef COLORS_H
#define COLORS_H

#define __reset                 "0"

#define __bold                  "1"

#define __black                 "30"
#define __red                   "31"
#define __green                 "32"
#define __yellow                "33"
#define __blue                  "34"
#define __magenta               "35"
#define __cyan                  "36"
#define __white                 "37"

#define __on_black              "40"
#define __on_red                "41"
#define __on_green              "42"
#define __on_yellow             "43"
#define __on_blue               "44"
#define __on_magenta            "45"
#define __on_cyan               "46"
#define __on_white              "47"

#define colorize_start(fore)		"\033[" __##fore "m"
#define colorize_start_full(fore, back)	"\033[" __##fore ";" __on_##back "m"
#define colorize_end()			"\033[" __reset "m"

#endif /* COLORS_H */