1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
|
/*
* Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch>
*
* This file is part of nios2sim-ng.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <stdio.h>
#include <string.h>
#include "nios2sim-ng.h"
#include "nios2.h"
#include "memory.h"
#include "device.h"
void nios2_cpu_reset(struct nios2 *cpu)
{
/* Reset registers */
memset(cpu->gp_regs, 0x00, NIOS2_GP_REG_COUNT * sizeof(uint32_t));
memset(cpu->ctrl_regs, 0x00, NIOS2_CTRL_REG_COUNT * sizeof(uint32_t));
cpu->pc = 0;
cpu->mode = NIOS2_SUPERVISOR_MODE;
}
void nios2_cpu_init(struct nios2 *cpu)
{
/* Set PC to entry address of program */
cpu->pc = cpu->mem->image_base;
}
void nios2_cpu_inc_pc(struct nios2 *cpu)
{
cpu->pc += 4;
}
void nios2_simulate(struct nios2 *cpu)
{
/* Did anyone write to r0? */
if (cpu->gp_regs[zero]) {
warn("Written to r0\n");
cpu->gp_regs[zero] = 0;
}
}
bool nios2_in_user_mode(struct nios2 *cpu)
{
if (!cpu->has_mmu)
return false;
else if (cpu->mode != NIOS2_USER_MODE)
return false;
else
return true;
}
bool nios2_in_supervisor_mode(struct nios2 *cpu)
{
return !nios2_in_user_mode(cpu);
}
void nios2_exception(struct nios2 *cpu, uint8_t cause)
{
cpu->ctrl_regs[exception] = (cause << 2) & 0x7C;
}
uint32_t nios2_fetch_instr(struct nios2 *cpu)
{
struct memory *mem = cpu->mem;
return mem->base[cpu->pc / 4];
}
int nios2_execute_instr(struct nios2 *cpu, uint32_t instr)
{
instruction_handler handle_instr = instruction_get_handler(instr);
if (unlikely(handle_instr == NULL))
return INSTR_ERR;
return handle_instr(cpu, instr);
}
static bool is_mem_addr(struct memory *mem, uint32_t addr)
{
if (addr >= mem->image_base && addr < (mem->image_base + mem->size))
return true;
else
return false;
}
int nios2_load_byte(struct nios2 *cpu, uint32_t addr, uint8_t *data)
{
struct memory *mem = cpu->mem;
dbg("ldb %08x\n", addr);
if (is_mem_addr(mem, addr)) {
dbg("load byte MEM\n");
*data = memory_get_byte(mem, addr);
} else { /* must be I/O */
struct device *dev = device_get_by_addr(addr);
dbg("load byte I/O\n");
if (unlikely(dev == NULL)) {
err("Reading data outside of device range (0x%08x)\n", addr);
return -1;
}
if (dev->read(dev, addr, data, 1) != 1) {
err("Read from device '%s' failed\n", dev->name);
return -1;
}
}
return 0;
}
int nios2_store_byte(struct nios2 *cpu, uint32_t addr, uint8_t data)
{
struct memory *mem = cpu->mem;
dbg("stb %02x @ %08x\n", data, addr);
if (is_mem_addr(mem, addr)) {
dbg("store byte MEM\n");
memory_set_byte(mem, addr, data);
} else { /* must be I/O */
struct device *dev = device_get_by_addr(addr);
dbg("store byte I/O\n");
if (unlikely(dev == NULL)) {
err("Writing data outside of device range (0x%08x)\n", addr);
return -1;
}
if (dev->write(dev, addr, &data, 1) != 1) {
err("Write to device '%s' failed\n", dev->name);
return -1;
}
}
return 0;
}
int nios2_load_word(struct nios2 *cpu, uint32_t addr, uint32_t *data)
{
struct memory *mem = cpu->mem;
dbg("ldw %08x\n", addr);
if (is_mem_addr(mem, addr)) {
dbg("load word MEM\n");
*data = memory_get_word(mem, addr);
} else { /* must be I/O */
struct device *dev = device_get_by_addr(addr);
dbg("load byte I/O\n");
if (unlikely(dev == NULL)) {
err("Reading data outside of device range (0x%08x)\n", addr);
return -1;
}
if (dev->read(dev, addr, (uint8_t *) data, 4) != 1) {
err("Read from device '%s' failed\n", dev->name);
return -1;
}
}
return 0;
}
static const char *nios2_gp_registers[] = {
"zero",
"at",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
"r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
"r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
"et",
"bt",
"gp",
"sp",
"fp",
"ea",
"ba",
"ra",
};
static const char *nios2_ctrl_registers[] = {
"status",
"estatus",
"bstatus",
"ienable",
"ipending",
"cpuid",
"reserved",
"exception",
"pteaddr",
"tlbacc",
"tlbmisc",
"reserved",
"badaddr",
"config",
"mpubase",
"mpuacc"
};
void nios2_dump_registers(struct nios2 *cpu)
{
unsigned int i;
uint32_t *gp_regs = cpu->gp_regs;
uint32_t *ctrl_regs = cpu->ctrl_regs;
info("General-purpose registers:\n");
for (i = 0; i < NIOS2_GP_REG_COUNT; i++) {
info(" %10s 0x%08x", nios2_gp_registers[i], gp_regs[i]);
if ((i + 1) % 4 == 0)
info("\n");
}
info("Control registers:\n");
for (i = 0; i < NIOS2_CTRL_REG_COUNT; i++) {
info(" %10s 0x%08x", nios2_ctrl_registers[i], ctrl_regs[i]);
if ((i + 1) % 4 == 0)
info("\n");
}
}
|
