Initial commit

8 files changed, 1254 insertions, 0 deletions

diff --git a/lib/altera/cyc3_pll_0ns.qip b/lib/altera/cyc3_pll_0ns.qip
new file mode 100644
index 0000000..b5fc63e
--- /dev/null
+++ b/lib/altera/cyc3_pll_0ns.qip
@@ -0,0 +1,5 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"

+set_global_assignment -name IP_TOOL_VERSION "8.0"

+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "cyc3_pll_0ns.vhd"]

+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "cyc3_pll_0ns.cmp"]

+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "cyc3_pll_0ns.ppf"]

diff --git a/lib/altera/cyc3_pll_0ns.vhd b/lib/altera/cyc3_pll_0ns.vhd
new file mode 100644
index 0000000..6ef53f9
--- /dev/null
+++ b/lib/altera/cyc3_pll_0ns.vhd
@@ -0,0 +1,351 @@
+-- megafunction wizard: %ALTPLL%

+-- GENERATION: STANDARD

+-- VERSION: WM1.0

+-- MODULE: altpll 

+

+-- ============================================================

+-- File Name: cyc3_pll_0ns.vhd

+-- Megafunction Name(s):

+-- 			altpll

+--

+-- Simulation Library Files(s):

+-- 			altera_mf

+-- ============================================================

+-- ************************************************************

+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!

+--

+-- 8.0 Build 215 05/29/2008 SJ Web Edition

+-- ************************************************************

+

+

+--Copyright (C) 1991-2008 Altera Corporation

+--Your use of Altera Corporation's design tools, logic functions 

+--and other software and tools, and its AMPP partner logic 

+--functions, and any output files from any of the foregoing 

+--(including device programming or simulation files), and any 

+--associated documentation or information are expressly subject 

+--to the terms and conditions of the Altera Program License 

+--Subscription Agreement, Altera MegaCore Function License 

+--Agreement, or other applicable license agreement, including, 

+--without limitation, that your use is for the sole purpose of 

+--programming logic devices manufactured by Altera and sold by 

+--Altera or its authorized distributors.  Please refer to the 

+--applicable agreement for further details.

+

+

+LIBRARY ieee;

+USE ieee.std_logic_1164.all;

+

+LIBRARY altera_mf;

+USE altera_mf.all;

+

+ENTITY cyc3_pll_0ns IS

+	PORT

+	(

+		inclk0		: IN STD_LOGIC  := '0';

+		c0		: OUT STD_LOGIC 

+	);

+END cyc3_pll_0ns;

+

+

+ARCHITECTURE SYN OF cyc3_pll_0ns IS

+

+	SIGNAL sub_wire0	: STD_LOGIC_VECTOR (4 DOWNTO 0);

+	SIGNAL sub_wire1	: STD_LOGIC ;

+	SIGNAL sub_wire2	: STD_LOGIC ;

+	SIGNAL sub_wire3	: STD_LOGIC_VECTOR (1 DOWNTO 0);

+	SIGNAL sub_wire4_bv	: BIT_VECTOR (0 DOWNTO 0);

+	SIGNAL sub_wire4	: STD_LOGIC_VECTOR (0 DOWNTO 0);

+

+

+

+	COMPONENT altpll

+	GENERIC (

+		bandwidth_type		: STRING;

+		clk0_divide_by		: NATURAL;

+		clk0_duty_cycle		: NATURAL;

+		clk0_multiply_by		: NATURAL;

+		clk0_phase_shift		: STRING;

+		compensate_clock		: STRING;

+		inclk0_input_frequency		: NATURAL;

+		intended_device_family		: STRING;

+		lpm_hint		: STRING;

+		lpm_type		: STRING;

+		operation_mode		: STRING;

+		pll_type		: STRING;

+		port_activeclock		: STRING;

+		port_areset		: STRING;

+		port_clkbad0		: STRING;

+		port_clkbad1		: STRING;

+		port_clkloss		: STRING;

+		port_clkswitch		: STRING;

+		port_configupdate		: STRING;

+		port_fbin		: STRING;

+		port_inclk0		: STRING;

+		port_inclk1		: STRING;

+		port_locked		: STRING;

+		port_pfdena		: STRING;

+		port_phasecounterselect		: STRING;

+		port_phasedone		: STRING;

+		port_phasestep		: STRING;

+		port_phaseupdown		: STRING;

+		port_pllena		: STRING;

+		port_scanaclr		: STRING;

+		port_scanclk		: STRING;

+		port_scanclkena		: STRING;

+		port_scandata		: STRING;

+		port_scandataout		: STRING;

+		port_scandone		: STRING;

+		port_scanread		: STRING;

+		port_scanwrite		: STRING;

+		port_clk0		: STRING;

+		port_clk1		: STRING;

+		port_clk2		: STRING;

+		port_clk3		: STRING;

+		port_clk4		: STRING;

+		port_clk5		: STRING;

+		port_clkena0		: STRING;

+		port_clkena1		: STRING;

+		port_clkena2		: STRING;

+		port_clkena3		: STRING;

+		port_clkena4		: STRING;

+		port_clkena5		: STRING;

+		port_extclk0		: STRING;

+		port_extclk1		: STRING;

+		port_extclk2		: STRING;

+		port_extclk3		: STRING;

+		width_clock		: NATURAL

+	);

+	PORT (

+			inclk	: IN STD_LOGIC_VECTOR (1 DOWNTO 0);

+			clk	: OUT STD_LOGIC_VECTOR (4 DOWNTO 0)

+	);

+	END COMPONENT;

+

+BEGIN

+	sub_wire4_bv(0 DOWNTO 0) <= "0";

+	sub_wire4    <= To_stdlogicvector(sub_wire4_bv);

+	sub_wire1    <= sub_wire0(0);

+	c0    <= sub_wire1;

+	sub_wire2    <= inclk0;

+	sub_wire3    <= sub_wire4(0 DOWNTO 0) & sub_wire2;

+

+	altpll_component : altpll

+	GENERIC MAP (

+		bandwidth_type => "AUTO",

+		clk0_divide_by => 1,

+		clk0_duty_cycle => 50,

+		clk0_multiply_by => 1,

+		clk0_phase_shift => "0",

+		compensate_clock => "CLK0",

+		inclk0_input_frequency => 20000,

+		intended_device_family => "Cyclone III",

+		lpm_hint => "CBX_MODULE_PREFIX=cyc3_pll_0ns",

+		lpm_type => "altpll",

+		operation_mode => "NORMAL",

+		pll_type => "Fast",

+		port_activeclock => "PORT_UNUSED",

+		port_areset => "PORT_UNUSED",

+		port_clkbad0 => "PORT_UNUSED",

+		port_clkbad1 => "PORT_UNUSED",

+		port_clkloss => "PORT_UNUSED",

+		port_clkswitch => "PORT_UNUSED",

+		port_configupdate => "PORT_UNUSED",

+		port_fbin => "PORT_UNUSED",

+		port_inclk0 => "PORT_USED",

+		port_inclk1 => "PORT_UNUSED",

+		port_locked => "PORT_UNUSED",

+		port_pfdena => "PORT_UNUSED",

+		port_phasecounterselect => "PORT_UNUSED",

+		port_phasedone => "PORT_UNUSED",

+		port_phasestep => "PORT_UNUSED",

+		port_phaseupdown => "PORT_UNUSED",

+		port_pllena => "PORT_UNUSED",

+		port_scanaclr => "PORT_UNUSED",

+		port_scanclk => "PORT_UNUSED",

+		port_scanclkena => "PORT_UNUSED",

+		port_scandata => "PORT_UNUSED",

+		port_scandataout => "PORT_UNUSED",

+		port_scandone => "PORT_UNUSED",

+		port_scanread => "PORT_UNUSED",

+		port_scanwrite => "PORT_UNUSED",

+		port_clk0 => "PORT_USED",

+		port_clk1 => "PORT_UNUSED",

+		port_clk2 => "PORT_UNUSED",

+		port_clk3 => "PORT_UNUSED",

+		port_clk4 => "PORT_UNUSED",

+		port_clk5 => "PORT_UNUSED",

+		port_clkena0 => "PORT_UNUSED",

+		port_clkena1 => "PORT_UNUSED",

+		port_clkena2 => "PORT_UNUSED",

+		port_clkena3 => "PORT_UNUSED",

+		port_clkena4 => "PORT_UNUSED",

+		port_clkena5 => "PORT_UNUSED",

+		port_extclk0 => "PORT_UNUSED",

+		port_extclk1 => "PORT_UNUSED",

+		port_extclk2 => "PORT_UNUSED",

+		port_extclk3 => "PORT_UNUSED",

+		width_clock => 5

+	)

+	PORT MAP (

+		inclk => sub_wire3,

+		clk => sub_wire0

+	);

+

+

+

+END SYN;

+

+-- ============================================================

+-- CNX file retrieval info

+-- ============================================================

+-- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"

+-- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"

+-- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"

+-- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"

+-- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"

+-- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"

+-- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"

+-- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"

+-- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"

+-- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"

+-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"

+-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"

+-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"

+-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"

+-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"

+-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "6"

+-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"

+-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"

+-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"

+-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"

+-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"

+-- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"

+-- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"

+-- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"

+-- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"

+-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000"

+-- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"

+-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"

+-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"

+-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"

+-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"

+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"

+-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"

+-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"

+-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"

+-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"

+-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"

+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"

+-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"

+-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"

+-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"

+-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"

+-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"

+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"

+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"

+-- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"

+-- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"

+-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"

+-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"

+-- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"

+-- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"

+-- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"

+-- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"

+-- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"

+-- Retrieval info: PRIVATE: RECONFIG_FILE STRING "cyc3_pll_0ns.mif"

+-- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"

+-- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"

+-- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"

+-- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"

+-- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"

+-- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"

+-- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"

+-- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"

+-- Retrieval info: PRIVATE: SPREAD_USE STRING "0"

+-- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"

+-- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"

+-- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"

+-- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"

+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"

+-- Retrieval info: PRIVATE: USE_CLK0 STRING "1"

+-- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"

+-- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"

+-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"

+-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all

+-- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"

+-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"

+-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"

+-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"

+-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"

+-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"

+-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000"

+-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"

+-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"

+-- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"

+-- Retrieval info: CONSTANT: PLL_TYPE STRING "Fast"

+-- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"

+-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"

+-- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"

+-- Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"

+-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"

+-- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"

+-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"

+-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0

+-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0

+-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_0ns.vhd TRUE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_0ns.ppf TRUE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_0ns.inc FALSE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_0ns.cmp TRUE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_0ns.bsf FALSE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_0ns_inst.vhd FALSE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_0ns_waveforms.html TRUE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_0ns_wave*.jpg FALSE FALSE

+-- Retrieval info: LIB_FILE: altera_mf

+-- Retrieval info: CBX_MODULE_PREFIX: ON

diff --git a/lib/altera/cyc3_pll_m3ns.qip b/lib/altera/cyc3_pll_m3ns.qip
new file mode 100644
index 0000000..0a32086
--- /dev/null
+++ b/lib/altera/cyc3_pll_m3ns.qip
@@ -0,0 +1,5 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"

+set_global_assignment -name IP_TOOL_VERSION "8.0"

+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "cyc3_pll_m3ns.vhd"]

+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "cyc3_pll_m3ns.cmp"]

+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "cyc3_pll_m3ns.ppf"]

diff --git a/lib/altera/cyc3_pll_m3ns.vhd b/lib/altera/cyc3_pll_m3ns.vhd
new file mode 100644
index 0000000..0643ce0
--- /dev/null
+++ b/lib/altera/cyc3_pll_m3ns.vhd
@@ -0,0 +1,351 @@
+-- megafunction wizard: %ALTPLL%

+-- GENERATION: STANDARD

+-- VERSION: WM1.0

+-- MODULE: altpll 

+

+-- ============================================================

+-- File Name: cyc3_pll_m3ns.vhd

+-- Megafunction Name(s):

+-- 			altpll

+--

+-- Simulation Library Files(s):

+-- 			altera_mf

+-- ============================================================

+-- ************************************************************

+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!

+--

+-- 8.0 Build 215 05/29/2008 SJ Web Edition

+-- ************************************************************

+

+

+--Copyright (C) 1991-2008 Altera Corporation

+--Your use of Altera Corporation's design tools, logic functions 

+--and other software and tools, and its AMPP partner logic 

+--functions, and any output files from any of the foregoing 

+--(including device programming or simulation files), and any 

+--associated documentation or information are expressly subject 

+--to the terms and conditions of the Altera Program License 

+--Subscription Agreement, Altera MegaCore Function License 

+--Agreement, or other applicable license agreement, including, 

+--without limitation, that your use is for the sole purpose of 

+--programming logic devices manufactured by Altera and sold by 

+--Altera or its authorized distributors.  Please refer to the 

+--applicable agreement for further details.

+

+

+LIBRARY ieee;

+USE ieee.std_logic_1164.all;

+

+LIBRARY altera_mf;

+USE altera_mf.all;

+

+ENTITY cyc3_pll_m3ns IS

+	PORT

+	(

+		inclk0		: IN STD_LOGIC  := '0';

+		c0		: OUT STD_LOGIC 

+	);

+END cyc3_pll_m3ns;

+

+

+ARCHITECTURE SYN OF cyc3_pll_m3ns IS

+

+	SIGNAL sub_wire0	: STD_LOGIC_VECTOR (4 DOWNTO 0);

+	SIGNAL sub_wire1	: STD_LOGIC ;

+	SIGNAL sub_wire2	: STD_LOGIC ;

+	SIGNAL sub_wire3	: STD_LOGIC_VECTOR (1 DOWNTO 0);

+	SIGNAL sub_wire4_bv	: BIT_VECTOR (0 DOWNTO 0);

+	SIGNAL sub_wire4	: STD_LOGIC_VECTOR (0 DOWNTO 0);

+

+

+

+	COMPONENT altpll

+	GENERIC (

+		bandwidth_type		: STRING;

+		clk0_divide_by		: NATURAL;

+		clk0_duty_cycle		: NATURAL;

+		clk0_multiply_by		: NATURAL;

+		clk0_phase_shift		: STRING;

+		compensate_clock		: STRING;

+		inclk0_input_frequency		: NATURAL;

+		intended_device_family		: STRING;

+		lpm_hint		: STRING;

+		lpm_type		: STRING;

+		operation_mode		: STRING;

+		pll_type		: STRING;

+		port_activeclock		: STRING;

+		port_areset		: STRING;

+		port_clkbad0		: STRING;

+		port_clkbad1		: STRING;

+		port_clkloss		: STRING;

+		port_clkswitch		: STRING;

+		port_configupdate		: STRING;

+		port_fbin		: STRING;

+		port_inclk0		: STRING;

+		port_inclk1		: STRING;

+		port_locked		: STRING;

+		port_pfdena		: STRING;

+		port_phasecounterselect		: STRING;

+		port_phasedone		: STRING;

+		port_phasestep		: STRING;

+		port_phaseupdown		: STRING;

+		port_pllena		: STRING;

+		port_scanaclr		: STRING;

+		port_scanclk		: STRING;

+		port_scanclkena		: STRING;

+		port_scandata		: STRING;

+		port_scandataout		: STRING;

+		port_scandone		: STRING;

+		port_scanread		: STRING;

+		port_scanwrite		: STRING;

+		port_clk0		: STRING;

+		port_clk1		: STRING;

+		port_clk2		: STRING;

+		port_clk3		: STRING;

+		port_clk4		: STRING;

+		port_clk5		: STRING;

+		port_clkena0		: STRING;

+		port_clkena1		: STRING;

+		port_clkena2		: STRING;

+		port_clkena3		: STRING;

+		port_clkena4		: STRING;

+		port_clkena5		: STRING;

+		port_extclk0		: STRING;

+		port_extclk1		: STRING;

+		port_extclk2		: STRING;

+		port_extclk3		: STRING;

+		width_clock		: NATURAL

+	);

+	PORT (

+			inclk	: IN STD_LOGIC_VECTOR (1 DOWNTO 0);

+			clk	: OUT STD_LOGIC_VECTOR (4 DOWNTO 0)

+	);

+	END COMPONENT;

+

+BEGIN

+	sub_wire4_bv(0 DOWNTO 0) <= "0";

+	sub_wire4    <= To_stdlogicvector(sub_wire4_bv);

+	sub_wire1    <= sub_wire0(0);

+	c0    <= sub_wire1;

+	sub_wire2    <= inclk0;

+	sub_wire3    <= sub_wire4(0 DOWNTO 0) & sub_wire2;

+

+	altpll_component : altpll

+	GENERIC MAP (

+		bandwidth_type => "AUTO",

+		clk0_divide_by => 1,

+		clk0_duty_cycle => 50,

+		clk0_multiply_by => 1,

+		clk0_phase_shift => "-3000",

+		compensate_clock => "CLK0",

+		inclk0_input_frequency => 20000,

+		intended_device_family => "Cyclone III",

+		lpm_hint => "CBX_MODULE_PREFIX=cyc3_pll_m3ns",

+		lpm_type => "altpll",

+		operation_mode => "NORMAL",

+		pll_type => "Fast",

+		port_activeclock => "PORT_UNUSED",

+		port_areset => "PORT_UNUSED",

+		port_clkbad0 => "PORT_UNUSED",

+		port_clkbad1 => "PORT_UNUSED",

+		port_clkloss => "PORT_UNUSED",

+		port_clkswitch => "PORT_UNUSED",

+		port_configupdate => "PORT_UNUSED",

+		port_fbin => "PORT_UNUSED",

+		port_inclk0 => "PORT_USED",

+		port_inclk1 => "PORT_UNUSED",

+		port_locked => "PORT_UNUSED",

+		port_pfdena => "PORT_UNUSED",

+		port_phasecounterselect => "PORT_UNUSED",

+		port_phasedone => "PORT_UNUSED",

+		port_phasestep => "PORT_UNUSED",

+		port_phaseupdown => "PORT_UNUSED",

+		port_pllena => "PORT_UNUSED",

+		port_scanaclr => "PORT_UNUSED",

+		port_scanclk => "PORT_UNUSED",

+		port_scanclkena => "PORT_UNUSED",

+		port_scandata => "PORT_UNUSED",

+		port_scandataout => "PORT_UNUSED",

+		port_scandone => "PORT_UNUSED",

+		port_scanread => "PORT_UNUSED",

+		port_scanwrite => "PORT_UNUSED",

+		port_clk0 => "PORT_USED",

+		port_clk1 => "PORT_UNUSED",

+		port_clk2 => "PORT_UNUSED",

+		port_clk3 => "PORT_UNUSED",

+		port_clk4 => "PORT_UNUSED",

+		port_clk5 => "PORT_UNUSED",

+		port_clkena0 => "PORT_UNUSED",

+		port_clkena1 => "PORT_UNUSED",

+		port_clkena2 => "PORT_UNUSED",

+		port_clkena3 => "PORT_UNUSED",

+		port_clkena4 => "PORT_UNUSED",

+		port_clkena5 => "PORT_UNUSED",

+		port_extclk0 => "PORT_UNUSED",

+		port_extclk1 => "PORT_UNUSED",

+		port_extclk2 => "PORT_UNUSED",

+		port_extclk3 => "PORT_UNUSED",

+		width_clock => 5

+	)

+	PORT MAP (

+		inclk => sub_wire3,

+		clk => sub_wire0

+	);

+

+

+

+END SYN;

+

+-- ============================================================

+-- CNX file retrieval info

+-- ============================================================

+-- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"

+-- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"

+-- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"

+-- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"

+-- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"

+-- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"

+-- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"

+-- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"

+-- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"

+-- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"

+-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"

+-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"

+-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"

+-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"

+-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0"

+-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "6"

+-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"

+-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"

+-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"

+-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"

+-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"

+-- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"

+-- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"

+-- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"

+-- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"

+-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000"

+-- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"

+-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"

+-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"

+-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"

+-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"

+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"

+-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"

+-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"

+-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"

+-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"

+-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"

+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"

+-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"

+-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"

+-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"

+-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"

+-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"

+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"

+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"

+-- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"

+-- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "-3.00000000"

+-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "ns"

+-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"

+-- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"

+-- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"

+-- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"

+-- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"

+-- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"

+-- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"

+-- Retrieval info: PRIVATE: RECONFIG_FILE STRING "cyc3_pll_m3ns.mif"

+-- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"

+-- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"

+-- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"

+-- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"

+-- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"

+-- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"

+-- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"

+-- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"

+-- Retrieval info: PRIVATE: SPREAD_USE STRING "0"

+-- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"

+-- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"

+-- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"

+-- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"

+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"

+-- Retrieval info: PRIVATE: USE_CLK0 STRING "1"

+-- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"

+-- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"

+-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"

+-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all

+-- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"

+-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"

+-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"

+-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"

+-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "-3000"

+-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"

+-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000"

+-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"

+-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"

+-- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"

+-- Retrieval info: CONSTANT: PLL_TYPE STRING "Fast"

+-- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"

+-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"

+-- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"

+-- Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"

+-- Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"

+-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"

+-- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"

+-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"

+-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0

+-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0

+-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_m3ns.vhd TRUE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_m3ns.ppf TRUE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_m3ns.inc FALSE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_m3ns.cmp TRUE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_m3ns.bsf FALSE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_m3ns_inst.vhd FALSE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_m3ns_waveforms.html TRUE FALSE

+-- Retrieval info: GEN_FILE: TYPE_NORMAL cyc3_pll_m3ns_wave*.jpg FALSE FALSE

+-- Retrieval info: LIB_FILE: altera_mf

+-- Retrieval info: CBX_MODULE_PREFIX: ON

diff --git a/lib/altera/cyc3pll_eth_phy.qip b/lib/altera/cyc3pll_eth_phy.qip
new file mode 100644
index 0000000..3ec98fd
--- /dev/null
+++ b/lib/altera/cyc3pll_eth_phy.qip
@@ -0,0 +1,5 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"

+set_global_assignment -name IP_TOOL_VERSION "8.0"

+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "cyc3pll_eth_phy.vhd"]

+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "cyc3pll_eth_phy.cmp"]

+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "cyc3pll_eth_phy.ppf"]

diff --git a/lib/altera/sinet_pll.qip b/lib/altera/sinet_pll.qip
new file mode 100644
index 0000000..8fc5037
--- /dev/null
+++ b/lib/altera/sinet_pll.qip
@@ -0,0 +1,5 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"
+set_global_assignment -name IP_TOOL_VERSION "8.0"
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "sinet_pll.vhd"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "sinet_pll.cmp"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "sinet_pll.ppf"]
diff --git a/lib/altera/sinet_pll.vhd b/lib/altera/sinet_pll.vhd
new file mode 100644
index 0000000..a9c3abf
--- /dev/null
+++ b/lib/altera/sinet_pll.vhd
@@ -0,0 +1,444 @@
+-- megafunction wizard: %ALTPLL%
+-- GENERATION: STANDARD
+-- VERSION: WM1.0
+-- MODULE: altpll 
+
+-- ============================================================
+-- File Name: sinet_pll.vhd
+-- Megafunction Name(s):
+-- 			altpll
+--
+-- Simulation Library Files(s):
+-- 			altera_mf
+-- ============================================================
+-- ************************************************************
+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+--
+-- 8.0 Build 215 05/29/2008 SJ Full Version
+-- ************************************************************
+
+
+--Copyright (C) 1991-2008 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions 
+--and other software and tools, and its AMPP partner logic 
+--functions, and any output files from any of the foregoing 
+--(including device programming or simulation files), and any 
+--associated documentation or information are expressly subject 
+--to the terms and conditions of the Altera Program License 
+--Subscription Agreement, Altera MegaCore Function License 
+--Agreement, or other applicable license agreement, including, 
+--without limitation, that your use is for the sole purpose of 
+--programming logic devices manufactured by Altera and sold by 
+--Altera or its authorized distributors.  Please refer to the 
+--applicable agreement for further details.
+
+
+LIBRARY ieee;
+USE ieee.std_logic_1164.all;
+
+LIBRARY altera_mf;
+USE altera_mf.all;
+
+ENTITY sinet_pll IS
+	PORT
+	(
+		inclk0		: IN STD_LOGIC  := '0';
+		c0		: OUT STD_LOGIC ;
+		c1		: OUT STD_LOGIC ;
+		c2		: OUT STD_LOGIC ;
+		c3		: OUT STD_LOGIC 
+	);
+END sinet_pll;
+
+
+ARCHITECTURE SYN OF sinet_pll IS
+
+	SIGNAL sub_wire0	: STD_LOGIC_VECTOR (4 DOWNTO 0);
+	SIGNAL sub_wire1	: STD_LOGIC ;
+	SIGNAL sub_wire2	: STD_LOGIC ;
+	SIGNAL sub_wire3	: STD_LOGIC ;
+	SIGNAL sub_wire4	: STD_LOGIC ;
+	SIGNAL sub_wire5	: STD_LOGIC ;
+	SIGNAL sub_wire6	: STD_LOGIC_VECTOR (1 DOWNTO 0);
+	SIGNAL sub_wire7_bv	: BIT_VECTOR (0 DOWNTO 0);
+	SIGNAL sub_wire7	: STD_LOGIC_VECTOR (0 DOWNTO 0);
+
+
+
+	COMPONENT altpll
+	GENERIC (
+		bandwidth_type		: STRING;
+		clk0_divide_by		: NATURAL;
+		clk0_duty_cycle		: NATURAL;
+		clk0_multiply_by		: NATURAL;
+		clk0_phase_shift		: STRING;
+		clk1_divide_by		: NATURAL;
+		clk1_duty_cycle		: NATURAL;
+		clk1_multiply_by		: NATURAL;
+		clk1_phase_shift		: STRING;
+		clk2_divide_by		: NATURAL;
+		clk2_duty_cycle		: NATURAL;
+		clk2_multiply_by		: NATURAL;
+		clk2_phase_shift		: STRING;
+		clk3_divide_by		: NATURAL;
+		clk3_duty_cycle		: NATURAL;
+		clk3_multiply_by		: NATURAL;
+		clk3_phase_shift		: STRING;
+		compensate_clock		: STRING;
+		inclk0_input_frequency		: NATURAL;
+		intended_device_family		: STRING;
+		lpm_hint		: STRING;
+		lpm_type		: STRING;
+		operation_mode		: STRING;
+		pll_type		: STRING;
+		port_activeclock		: STRING;
+		port_areset		: STRING;
+		port_clkbad0		: STRING;
+		port_clkbad1		: STRING;
+		port_clkloss		: STRING;
+		port_clkswitch		: STRING;
+		port_configupdate		: STRING;
+		port_fbin		: STRING;
+		port_inclk0		: STRING;
+		port_inclk1		: STRING;
+		port_locked		: STRING;
+		port_pfdena		: STRING;
+		port_phasecounterselect		: STRING;
+		port_phasedone		: STRING;
+		port_phasestep		: STRING;
+		port_phaseupdown		: STRING;
+		port_pllena		: STRING;
+		port_scanaclr		: STRING;
+		port_scanclk		: STRING;
+		port_scanclkena		: STRING;
+		port_scandata		: STRING;
+		port_scandataout		: STRING;
+		port_scandone		: STRING;
+		port_scanread		: STRING;
+		port_scanwrite		: STRING;
+		port_clk0		: STRING;
+		port_clk1		: STRING;
+		port_clk2		: STRING;
+		port_clk3		: STRING;
+		port_clk4		: STRING;
+		port_clk5		: STRING;
+		port_clkena0		: STRING;
+		port_clkena1		: STRING;
+		port_clkena2		: STRING;
+		port_clkena3		: STRING;
+		port_clkena4		: STRING;
+		port_clkena5		: STRING;
+		port_extclk0		: STRING;
+		port_extclk1		: STRING;
+		port_extclk2		: STRING;
+		port_extclk3		: STRING;
+		width_clock		: NATURAL
+	);
+	PORT (
+			inclk	: IN STD_LOGIC_VECTOR (1 DOWNTO 0);
+			clk	: OUT STD_LOGIC_VECTOR (4 DOWNTO 0)
+	);
+	END COMPONENT;
+
+BEGIN
+	sub_wire7_bv(0 DOWNTO 0) <= "0";
+	sub_wire7    <= To_stdlogicvector(sub_wire7_bv);
+	sub_wire4    <= sub_wire0(3);
+	sub_wire3    <= sub_wire0(2);
+	sub_wire2    <= sub_wire0(1);
+	sub_wire1    <= sub_wire0(0);
+	c0    <= sub_wire1;
+	c1    <= sub_wire2;
+	c2    <= sub_wire3;
+	c3    <= sub_wire4;
+	sub_wire5    <= inclk0;
+	sub_wire6    <= sub_wire7(0 DOWNTO 0) & sub_wire5;
+
+	altpll_component : altpll
+	GENERIC MAP (
+		bandwidth_type => "AUTO",
+		clk0_divide_by => 1,
+		clk0_duty_cycle => 50,
+		clk0_multiply_by => 1,
+		clk0_phase_shift => "0",
+		clk1_divide_by => 2,
+		clk1_duty_cycle => 50,
+		clk1_multiply_by => 1,
+		clk1_phase_shift => "0",
+		clk2_divide_by => 4,
+		clk2_duty_cycle => 50,
+		clk2_multiply_by => 1,
+		clk2_phase_shift => "0",
+		clk3_divide_by => 1,
+		clk3_duty_cycle => 50,
+		clk3_multiply_by => 1,
+		clk3_phase_shift => "-3000",
+		compensate_clock => "CLK0",
+		inclk0_input_frequency => 20000,
+		intended_device_family => "Cyclone III",
+		lpm_hint => "CBX_MODULE_PREFIX=sinet_pll",
+		lpm_type => "altpll",
+		operation_mode => "NORMAL",
+		pll_type => "Fast",
+		port_activeclock => "PORT_UNUSED",
+		port_areset => "PORT_UNUSED",
+		port_clkbad0 => "PORT_UNUSED",
+		port_clkbad1 => "PORT_UNUSED",
+		port_clkloss => "PORT_UNUSED",
+		port_clkswitch => "PORT_UNUSED",
+		port_configupdate => "PORT_UNUSED",
+		port_fbin => "PORT_UNUSED",
+		port_inclk0 => "PORT_USED",
+		port_inclk1 => "PORT_UNUSED",
+		port_locked => "PORT_UNUSED",
+		port_pfdena => "PORT_UNUSED",
+		port_phasecounterselect => "PORT_UNUSED",
+		port_phasedone => "PORT_UNUSED",
+		port_phasestep => "PORT_UNUSED",
+		port_phaseupdown => "PORT_UNUSED",
+		port_pllena => "PORT_UNUSED",
+		port_scanaclr => "PORT_UNUSED",
+		port_scanclk => "PORT_UNUSED",
+		port_scanclkena => "PORT_UNUSED",
+		port_scandata => "PORT_UNUSED",
+		port_scandataout => "PORT_UNUSED",
+		port_scandone => "PORT_UNUSED",
+		port_scanread => "PORT_UNUSED",
+		port_scanwrite => "PORT_UNUSED",
+		port_clk0 => "PORT_USED",
+		port_clk1 => "PORT_USED",
+		port_clk2 => "PORT_USED",
+		port_clk3 => "PORT_USED",
+		port_clk4 => "PORT_UNUSED",
+		port_clk5 => "PORT_UNUSED",
+		port_clkena0 => "PORT_UNUSED",
+		port_clkena1 => "PORT_UNUSED",
+		port_clkena2 => "PORT_UNUSED",
+		port_clkena3 => "PORT_UNUSED",
+		port_clkena4 => "PORT_UNUSED",
+		port_clkena5 => "PORT_UNUSED",
+		port_extclk0 => "PORT_UNUSED",
+		port_extclk1 => "PORT_UNUSED",
+		port_extclk2 => "PORT_UNUSED",
+		port_extclk3 => "PORT_UNUSED",
+		width_clock => 5
+	)
+	PORT MAP (
+		inclk => sub_wire6,
+		clk => sub_wire0
+	);
+
+
+
+END SYN;
+
+-- ============================================================
+-- CNX file retrieval info
+-- ============================================================
+-- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
+-- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
+-- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
+-- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+-- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+-- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+-- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+-- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
+-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
+-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0"
+-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "6"
+-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
+-- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "2"
+-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "4"
+-- Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC "1"
+-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+-- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
+-- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
+-- Retrieval info: PRIVATE: DUTY_CYCLE3 STRING "50.00000000"
+-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
+-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+-- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+-- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
+-- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
+-- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
+-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000"
+-- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
+-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
+-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
+-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "deg"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT3 STRING "deg"
+-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
+-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+-- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
+-- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
+-- Retrieval info: PRIVATE: MIRROR_CLK3 STRING "0"
+-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
+-- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1"
+-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "1"
+-- Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC "1"
+-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.00000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "100.00000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING "100.00000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE3 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT3 STRING "MHz"
+-- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
+-- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT3 STRING "-3.00000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT3 STRING "ns"
+-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+-- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+-- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
+-- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
+-- Retrieval info: PRIVATE: RECONFIG_FILE STRING "sinet_pll.mif"
+-- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
+-- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
+-- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
+-- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+-- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+-- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
+-- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+-- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+-- Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+-- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+-- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+-- Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
+-- Retrieval info: PRIVATE: STICKY_CLK2 STRING "1"
+-- Retrieval info: PRIVATE: STICKY_CLK3 STRING "1"
+-- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
+-- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+-- Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLK1 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLK2 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLK3 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
+-- Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
+-- Retrieval info: PRIVATE: USE_CLKENA2 STRING "0"
+-- Retrieval info: PRIVATE: USE_CLKENA3 STRING "0"
+-- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
+-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
+-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+-- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
+-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
+-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"
+-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "2"
+-- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "1"
+-- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
+-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "4"
+-- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "1"
+-- Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
+-- Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC "1"
+-- Retrieval info: CONSTANT: CLK3_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC "1"
+-- Retrieval info: CONSTANT: CLK3_PHASE_SHIFT STRING "-3000"
+-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000"
+-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
+-- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
+-- Retrieval info: CONSTANT: PLL_TYPE STRING "Fast"
+-- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_USED"
+-- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
+-- Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
+-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"
+-- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+-- Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
+-- Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
+-- Retrieval info: USED_PORT: c3 0 0 0 0 OUTPUT_CLK_EXT VCC "c3"
+-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
+-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
+-- Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
+-- Retrieval info: CONNECT: c3 0 0 0 0 @clk 0 0 1 3
+-- Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2
+-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
+-- Retrieval info: GEN_FILE: TYPE_NORMAL sinet_pll.vhd TRUE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL sinet_pll.ppf TRUE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL sinet_pll.inc FALSE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL sinet_pll.cmp TRUE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL sinet_pll.bsf FALSE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL sinet_pll_inst.vhd FALSE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL sinet_pll_waveforms.html TRUE FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL sinet_pll_wave*.jpg FALSE FALSE
+-- Retrieval info: LIB_FILE: altera_mf
+-- Retrieval info: CBX_MODULE_PREFIX: ON
diff --git a/lib/misc/components/reset_sync.vhd b/lib/misc/components/reset_sync.vhd
new file mode 100644
index 0000000..27c1e78
--- /dev/null
+++ b/lib/misc/components/reset_sync.vhd
@@ -0,0 +1,88 @@
+------------------------------------------------------------------
+--  _____       ______  _____                                    -
+-- |_   _|     |  ____|/ ____|  Institute of Embedded Systems    -
+--   | |  _ __ | |__  | (___    Zuercher Hochschule fuer         -
+--   | | | '_ \|  __|  \___ \   angewandte Wissenschaften        -
+--  _| |_| | | | |____ ____) |  (University of Applied Sciences) -
+-- |_____|_| |_|______|_____/   8401 Winterthur, Switzerland     -
+------------------------------------------------------------------
+--
+-- Project     : SInet
+-- Module      : synthesis library ines_misc
+-- Description : reset synchronisytion
+--
+-- $LastChangedDate: 2008-10-31 12:06:00 +0100 (Fri, 31 Oct 2008) $
+-- $Rev: 1905 $
+-- $Author: ffar $
+-----------------------------------------------------------------
+--
+-- Change History
+-- Date     |Name      |Modification
+-----------------------------------------------------------------
+-- 02.11.07 | ffar     | file created based on library component
+-- 24.06.08 | kelt     | resets synchronized
+-----------------------------------------------------------------
+
+
+library ieee;
+  use ieee.std_logic_1164.all;
+
+package reset_sync_pkg is
+  component reset_sync
+    generic(
+      STAGES   : integer := 4
+    );
+    port(
+      clk_i      : in  std_logic;
+      reset1_n_i : in  std_logic;
+      reset2_n_i : in  std_logic := '1';
+      reset_n_o  : out std_logic := '0'
+    );
+  end component reset_sync;
+end package reset_sync_pkg;
+
+
+library ieee;
+  use ieee.std_logic_1164.all;
+  use ieee.numeric_std.all;
+
+entity reset_sync is
+  generic(
+    STAGES   : integer := 4
+  );
+  port(
+    clk_i      : in  std_logic;
+    reset1_n_i : in  std_logic;
+    reset2_n_i : in  std_logic := '1';
+    reset_n_o  : out std_logic := '0'
+  );
+end reset_sync;
+
+architecture rtl of reset_sync is
+
+  signal reset1_n_f, reset1_n_ff        : std_logic;
+  signal reset2_n_f, reset2_n_ff        : std_logic;
+
+begin
+
+  reset_prc : process(clk_i)
+    variable count : integer range 0 to STAGES-1 := 0;
+  begin
+    if clk_i'event and clk_i = '1' then
+      reset1_n_f    <= reset1_n_i;
+      reset1_n_ff   <= reset1_n_f;
+      reset2_n_f    <= reset2_n_i;
+      reset2_n_ff   <= reset2_n_f;
+      if (reset1_n_ff and reset2_n_ff) = '0' then
+        reset_n_o   <= '0';
+        count       :=  0;
+      elsif count < STAGES-1 then
+        reset_n_o   <= '0';
+        count       := count + 1;
+      else
+        reset_n_o   <= '1';
+      end if;
+    end if;
+  end process reset_prc;
+
+end rtl;
\ No newline at end of file