Rename project, correctly instantiate SOPC system

4 files changed, 113 insertions, 107 deletions

diff --git a/dionysos_top.vhd b/dionysos_top.vhd
index faa6b65..208b967 100644
--- a/dionysos_top.vhd
+++ b/dionysos_top.vhd
@@ -16,7 +16,7 @@
 ------------|----------|-----------------------------------------
 -- 14.02.07 | kelt     |file created for SInet
 ------------|----------|-----------------------------------------
--- 22.02.10 | klto     |file adjusted for dionysos-nios2mmu project
+-- 22.02.10 | klto     |file adjusted for dionysos_nios2mmu project
 -----------------------------------------------------------------
 
 library ieee;
@@ -198,12 +198,12 @@ architecture rtl of dionysos_top is
   --! \li EPCS Controller
   --! \n See \subpage nios_config_page for details
 
-  cpu : entity work.cpu_0
+  dionysos_nios2mmu_inst : work.dionysos_nios2mmu
     port map(
-      clk                                         => pll_clk_50,
+      clk_0                                       => pll_clk_50,
       reset_n                                     => reset_nios_n,
 
-      -- the_sdram_0
+      -- sdram_0
       zs_addr_from_the_sdram_0                    => dram_a_o(11 downto 0), -- dram_a_o(12) is for 32Mbit SDRAM
       zs_ba_from_the_sdram_0                      => dram_ba,
       zs_cas_n_from_the_sdram_0                   => dram_cas_n_o,
@@ -214,22 +214,22 @@ architecture rtl of dionysos_top is
       zs_ras_n_from_the_sdram_0                   => dram_ras_n_o,
       zs_we_n_from_the_sdram_0                    => dram_we_n_o,
 
-      -- the_tri_state_bridge_0_avalon_slave
+      -- tri_state_bridge_0
       select_n_to_the_cfi_flash_0                 => flash_ce_n_o,
       tri_state_bridge_0_address                  => flash_a_o,
       tri_state_bridge_0_data                     => flash_d_io,
       tri_state_bridge_0_readn                    => flash_oe_n_o,
       write_n_to_the_cfi_flash_0                  => flash_we_n_o,
 
-      -- the_uart_0
+      -- uart_0
       rxd_to_the_uart_0                           => nios_uart_rxd_i,
       txd_from_the_uart_0                         => nios_uart_txd_o,
 
-      -- the_epcs_controller
-      data0_to_the_epcs_controller                => config_data0_i,
-      dclk_from_the_epcs_controller               => config_dclk_o,
-      sce_from_the_epcs_controller                => config_ce_n_o,
-      sdo_from_the_epcs_controller                => config_asd0_o
+      -- epcs_controller
+      data0_to_the_epcs_flash_controller_0        => config_data0_i,
+      dclk_from_the_epcs_flash_controller_0       => config_dclk_o,
+      sce_from_the_epcs_flash_controller_0        => config_ce_n_o,
+      sdo_from_the_epcs_flash_controller_0        => config_asd0_o
     );
 --@}
 end rtl;
diff --git a/quartus/dionysos_nios2mmu.qsf b/quartus/dionysos_nios2mmu.qsf
index 1d72e86..925dfed 100644
--- a/quartus/dionysos_nios2mmu.qsf
+++ b/quartus/dionysos_nios2mmu.qsf
@@ -25,7 +25,7 @@
 # Notes:
 #
 # 1) The default values for assignments are stored in the file:
-#		dionysos-nios2mmu_assignment_defaults.qdf
+#		dionysos_nios2mmu_assignment_defaults.qdf
 #    If this file doesn't exist, see file:
 #		assignment_defaults.qdf
 #
@@ -427,7 +427,13 @@ set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
 set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
 set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
 
+
+set_global_assignment -name QIP_FILE ../lib/altera/sinet_pll.qip
 set_global_assignment -name VHDL_FILE ../lib/misc/components/reset_sync.vhd
 set_global_assignment -name VHDL_FILE ../dionysos_top.vhd
+set_global_assignment -name QIP_FILE dionysos_nios2mmu.qip
+set_global_assignment -name VHDL_FILE dionysos_nios2mmu.vhd
+
+
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/quartus/dionysos_nios2mmu.sopc b/quartus/dionysos_nios2mmu.sopc
index 6bbc587..441628a 100644
--- a/quartus/dionysos_nios2mmu.sopc
+++ b/quartus/dionysos_nios2mmu.sopc
@@ -19,7 +19,7 @@
       }
       datum megawizard_uipreferences
       {
-         value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos-nios2mmu}";
+         value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu}";
          type = "String";
       }
    }
@@ -40,7 +40,7 @@
       }
       datum megawizard_uipreferences
       {
-         value = "{}";
+         value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}";
          type = "String";
       }
    }
@@ -102,27 +102,19 @@
          type = "String";
       }
    }
-   element onchip_memory2_0.s1
-   {
-      datum baseAddress
-      {
-         value = "4096";
-         type = "long";
-      }
-   }
-   element timer_0.s1
+   element cfi_flash_0.s1
    {
       datum baseAddress
       {
-         value = "41951232";
+         value = "37748736";
          type = "long";
       }
    }
-   element uart_0.s1
+   element onchip_memory2_0.s1
    {
       datum baseAddress
       {
-         value = "41951264";
+         value = "4096";
          type = "long";
       }
    }
@@ -139,11 +131,19 @@
          type = "long";
       }
    }
-   element cfi_flash_0.s1
+   element uart_0.s1
    {
       datum baseAddress
       {
-         value = "37748736";
+         value = "41951264";
+         type = "long";
+      }
+   }
+   element timer_0.s1
+   {
+      datum baseAddress
+      {
+         value = "41951232";
          type = "long";
       }
    }
@@ -156,7 +156,7 @@
       }
       datum megawizard_uipreferences
       {
-         value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos-nios2mmu}";
+         value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu}";
          type = "String";
       }
    }
@@ -205,9 +205,9 @@
  <parameter name="generateLegacySim" value="false" />
  <parameter name="hardcopyCompatible" value="false" />
  <parameter name="hdlLanguage" value="VHDL" />
- <parameter name="projectName">dionysos-nios2mmu.qpf</parameter>
+ <parameter name="projectName">dionysos_nios2mmu.qpf</parameter>
  <parameter name="systemHash" value="-19653124377" />
- <parameter name="timeStamp" value="1269273057814" />
+ <parameter name="timeStamp" value="1269614323453" />
  <module name="clk_0" kind="clock_source" version="9.1" enabled="1">
   <parameter name="clockFrequency" value="50000000" />
   <parameter name="clockFrequencyKnown" value="true" />
diff --git a/quartus/dionysos_nios2mmu.sopcinfo b/quartus/dionysos_nios2mmu.sopcinfo
index f3c2e42..537f4d8 100644
--- a/quartus/dionysos_nios2mmu.sopcinfo
+++ b/quartus/dionysos_nios2mmu.sopcinfo
@@ -4,7 +4,7 @@
  kind="com_altera_sopcmodel_ensemble_Ensemble"
  version="9.1">
  <!-- Format version 9.1 222 (Future versions may contain additional information.) -->
- <!-- 2010.03.22.16:53:15 -->
+ <!-- 2010.03.26.16:16:00 -->
  <!-- A collection of modules and connections -->
  <parameter name="deviceFamily">
   <type>com.altera.entityinterfaces.moduleext.IDeviceFamily$EDeviceFamily</type>
@@ -40,7 +40,7 @@
  </parameter>
  <parameter name="projectName">
   <type>java.lang.String</type>
-  <value>dionysos-nios2mmu.qpf</value>
+  <value>dionysos_nios2mmu.qpf</value>
   <derived>false</derived>
   <enabled>true</enabled>
   <visible>true</visible>
@@ -56,7 +56,7 @@
  </parameter>
  <parameter name="timeStamp">
   <type>long</type>
-  <value>1269273057814</value>
+  <value>1269616531099</value>
   <derived>false</derived>
   <enabled>true</enabled>
   <visible>true</visible>
@@ -9597,22 +9597,6 @@ parameters are a RESULT of the module parameters. -->
  </connection>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>altera_avalon_new_sdram_controller</name>
-  <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>SDRAM Controller</displayName>
-  <version>9.1</version>
- </plugin>
- <plugin>
-  <instanceCount>1</instanceCount>
-  <name>altera_avalon_cfi_flash</name>
-  <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>Flash Memory Interface (CFI)</displayName>
-  <version>9.1</version>
- </plugin>
- <plugin>
-  <instanceCount>1</instanceCount>
   <name>nios_custom_instruction_master</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
@@ -9620,11 +9604,11 @@ parameters are a RESULT of the module parameters. -->
   <version>9.1</version>
  </plugin>
  <plugin>
-  <instanceCount>4</instanceCount>
-  <name>interrupt_sender</name>
+  <instanceCount>1</instanceCount>
+  <name>altera_nios2</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Interrupt Sender</displayName>
+  <subtype>com.altera.entityinterfaces.IModule</subtype>
+  <displayName>Nios II Processor</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
@@ -9636,51 +9620,51 @@ parameters are a RESULT of the module parameters. -->
   <version>9.1</version>
  </plugin>
  <plugin>
-  <instanceCount>10</instanceCount>
-  <name>clock</name>
+  <instanceCount>1</instanceCount>
+  <name>avalon_tristate_slave</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IConnection</subtype>
-  <displayName>Clock Connection</displayName>
+  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
+  <displayName>Avalon Memory Mapped Tristate Slave</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
-  <instanceCount>11</instanceCount>
-  <name>clock_sink</name>
+  <instanceCount>1</instanceCount>
+  <name>altera_avalon_tri_state_bridge</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Clock Input</displayName>
+  <subtype>com.altera.entityinterfaces.IModule</subtype>
+  <displayName>Avalon-MM Tristate Bridge</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>altera_avalon_timer</name>
+  <name>altera_avalon_cfi_flash</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>Interval Timer</displayName>
+  <displayName>Flash Memory Interface (CFI)</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>altera_avalon_tri_state_bridge</name>
+  <name>clock_source</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>Avalon-MM Tristate Bridge</displayName>
+  <displayName>Clock Source</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
-  <instanceCount>1</instanceCount>
-  <name>avalon_tristate</name>
+  <instanceCount>9</instanceCount>
+  <name>avalon_slave</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IConnection</subtype>
-  <displayName>Avalon Memory Mapped Tristate Connection</displayName>
+  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
+  <displayName>Avalon Memory Mapped Slave</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>avalon_tristate_slave</name>
+  <name>altera_avalon_epcs_flash_controller</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Avalon Memory Mapped Tristate Slave</displayName>
+  <subtype>com.altera.entityinterfaces.IModule</subtype>
+  <displayName>EPCS Serial Flash Controller</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
@@ -9692,83 +9676,99 @@ parameters are a RESULT of the module parameters. -->
   <version>9.1</version>
  </plugin>
  <plugin>
-  <instanceCount>9</instanceCount>
-  <name>avalon_slave</name>
+  <instanceCount>10</instanceCount>
+  <name>clock</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Avalon Memory Mapped Slave</displayName>
+  <subtype>com.altera.entityinterfaces.IConnection</subtype>
+  <displayName>Clock Connection</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>interrupt_receiver</name>
+  <name>altera_avalon_uart</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Interrupt Receiver</displayName>
+  <subtype>com.altera.entityinterfaces.IModule</subtype>
+  <displayName>UART (RS-232 Serial Port)</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>altera_nios2</name>
+  <name>altera_avalon_jtag_uart</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>Nios II Processor</displayName>
+  <displayName>JTAG UART</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>clock_source</name>
+  <name>altera_avalon_timer</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>Clock Source</displayName>
+  <displayName>Interval Timer</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
-  <instanceCount>1</instanceCount>
-  <name>clock_source</name>
+  <instanceCount>11</instanceCount>
+  <name>clock_sink</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Clock Output</displayName>
+  <displayName>Clock Input</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>altera_avalon_onchip_memory2</name>
+  <name>avalon_tristate_master</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>On-Chip Memory (RAM or ROM)</displayName>
+  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
+  <displayName>Avalon Memory Mapped Tristate Master</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>altera_avalon_uart</name>
+  <name>avalon_tristate</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>UART (RS-232 Serial Port)</displayName>
+  <subtype>com.altera.entityinterfaces.IConnection</subtype>
+  <displayName>Avalon Memory Mapped Tristate Connection</displayName>
+  <version>9.1</version>
+ </plugin>
+ <plugin>
+  <instanceCount>4</instanceCount>
+  <name>interrupt_sender</name>
+  <type>com.altera.entityinterfaces.IElementClass</type>
+  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
+  <displayName>Interrupt Sender</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>altera_avalon_epcs_flash_controller</name>
+  <name>altera_avalon_onchip_memory2</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>EPCS Serial Flash Controller</displayName>
+  <displayName>On-Chip Memory (RAM or ROM)</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
-  <name>avalon_tristate_master</name>
+  <name>interrupt_receiver</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Avalon Memory Mapped Tristate Master</displayName>
+  <displayName>Interrupt Receiver</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
+  <instanceCount>3</instanceCount>
+  <name>conduit</name>
+  <type>com.altera.entityinterfaces.IElementClass</type>
+  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
+  <displayName>Conduit Endpoint</displayName>
+  <version>7.1</version>
+ </plugin>
+ <plugin>
   <instanceCount>1</instanceCount>
-  <name>altera_avalon_jtag_uart</name>
+  <name>clock_source</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>JTAG UART</displayName>
+  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
+  <displayName>Clock Output</displayName>
   <version>9.1</version>
  </plugin>
  <plugin>
@@ -9780,13 +9780,13 @@ parameters are a RESULT of the module parameters. -->
   <version>6.1</version>
  </plugin>
  <plugin>
-  <instanceCount>3</instanceCount>
-  <name>conduit</name>
+  <instanceCount>1</instanceCount>
+  <name>altera_avalon_new_sdram_controller</name>
   <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Conduit Endpoint</displayName>
-  <version>7.1</version>
+  <subtype>com.altera.entityinterfaces.IModule</subtype>
+  <displayName>SDRAM Controller</displayName>
+  <version>9.1</version>
  </plugin>
  <reportVersion>9.1 222</reportVersion>
- <uniqueIdentifier>0023AE674DE00000012786918231</uniqueIdentifier>
+ <uniqueIdentifier>001B213B645F000001279B0ACCA1</uniqueIdentifier>
 </EnsembleReport>